Fujitsu Network Card CS90A User Manual

130nm node CMOS Process (CS90A)  
Features  
Technology Code  
CS90A  
Transistor  
UHS  
110  
2.9  
HS  
110  
2.9  
1.2  
678  
-276  
4
ST  
110  
2.9  
LL  
110  
Physical Gate Length (nm)  
Gate Oxide Thickness (nm)  
Supply Voltage (V)  
NMOS Ids (µA/µm)  
PMOS Ids (µA/µm)  
NMOS Ioff (nA/µm)  
PMOS Ioff (nA/µm)  
Gate Leak Current (nA/µm)  
Basic Gate Delay (ps)  
Number of Available Poly Layer  
Number of Available Metal Layer  
Via Filling  
2.9  
1.2  
1.2  
1.2  
780  
-321  
36  
570  
-218  
0.18  
-0.22  
0.01  
28  
390  
-150  
0.005  
-0.015  
0.01  
45  
-18  
0.01  
14  
-3.1  
0.01  
17  
Mie plant  
1
8Cu+1Al  
Cu Dual Damascene  
Hybrid Low-k  
ILD Structure  
SRAM Cell Size (µm2)  
Dual Gate Oxide Options  
Mixed Signal Options  
RF Elements  
1.98  
Available  
Available  
MIM cap., Poly Resistor, Inductor  
RAM Redundancy  
Fuse  
Technology Roadmap  
1000  
180-nm  
Cu  
130-nm  
Cu+Low+k  
500  
90-nm  
Cu+VLK  
65-nm  
45-nm  
32-nm  
CS80/80A  
200  
100  
50  
CS90A  
CS100A_LL  
CS100A_G  
For ASIC & COT  
CS90  
CS200A_LL  
CS200A_G  
CS100  
For COT  
CS200  
20  
G: Generic, LL: Low Leakage  
1998 2000 2002  
10  
2004  
2006  
2008  
2010  
2012  
Year (Production Start)  
 

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